1. CMOS SRAM Circuit Design and Parametric Test in Nano-Scaled Technologies
Author: \ Andrei Pavlov, Manoj Sachdev
Library: Library of Foreign Languages and Islamic Sources (Qom)
Subject: Metal oxide semiconductors, Complementary -- Design. ,Random access memory.,نیمه هادیهای اکسید فلزی مکمل -- طراحی ,حافظه دسترسی تصادفی
Classification :
E-Book
,
2. CMOS SRAM Circuit Design and Parametric Test in Nano-Scaled Technologies: Process-Aware SRAM Design and Test
Author: / Andrei Pavlov, Manoj Sachdev
Library: Tehran University, technical faculty libraries 1 (Tehran)
Subject:
3. CMOS SRAM circuit design and parametric test in nano-scaled technologies
Author: / Andrei Pavlov, Manoj Sachdev
Library: Central Library, Center of Documentation and Supply of Scientific Resources (East Azarbaijan)
Subject: Metal oxide semiconductors, Complementar--Design,Random access memory,Nanoelectronics
Classification :
E-BOOK
4. CMOS SRAM circuit design and parametric test in nano-scaled technologies :process-aware SRAM design and test
Author: Pavlov, Andrei
Library: Library of Razi Metallurgical Research Center (Tehran)
Subject: Design ، Metal oxide semiconductors, Complementary,، Random access memory,، Nanoelectronics
Classification :
TK
7871
.
99
.
M44P38
2008
5. Defect-Oriented Testing For Nano-Metric CMOS VLSI Circuits
Author: / by Manoj Sachdev, Jose Pineda de Gyvez
Library: Central Library and Information Center of the University of Mohaghegh Ardabili (Ardabil)
Subject: CMOS VLSI Circuits
Classification :
TK7874
.
D47S2
2010
6. Defect Oriented Testing for CMOS Analog and Digital Circuits
Author: by Manoj Sachdev.
Library: Center and Library of Islamic Studies in European Languages (Qom)
Subject: Computer engineering.,Engineering design.,Engineering.
7. Defect-Oriented Testing for Nano-Metric CMOS VLSI Circuit
Author: / [electronic resource
Library: Central Library and Document Center of Shahid Chamran University (Khuzestan)
Subject:
8. Defect-Oriented Testing for Nano-Metric CMOS VLSI Circuits, 2nd Edition
Author: / Manoj Sachdev, Jose Pineda de Gyvez
Library: Tehran University, technical faculty libraries 1 (Tehran)
Subject:
9. Defect oriented testing for nano metric CMOS vlsi circuits
Author: Sachdev, Manoj.
Library: Library of Razi Metallurgical Research Center (Tehran)
Subject: ، Metal oxide semiconductors, Complementary- Testing,، Metal oxide semiconductors, Complementary- Defects
Classification :
TK
7871
.
99
.
M44
S23
2007
10. 2000 IEEE International Workshop on Defect Based Testing, April 30, 2000, Montreal, Canada
Author: sponsored by IEEE Computer Society Test Technology Technical Committee; edited by Yashwant K. Malaiya, Manoj Sachdev, Sankaran M. Menon
Library: Central Library and Information Center of Ferdowsi University of Mashhad (Khorasan Razavi)
Subject: Testing -- Congresses ، Metal oxide semiconductors, Complementary,Congresses ، Iddq testing,Defects -- Congresses ، Integrated circuits
Classification :
TK
7871
.
99
.
M44
2000
11. THERMAL AND POWER MANAGEMENT OF INTEGRATED CIRCULTS
Author: /Arman vassighi and Manoj sachdev
Library: National Library and Archives of Islamic Republic of Iran (Tehran)
Subject:
12. Thermal and power management of integrated circuits
Author: / Arman Vassighi and Manoj Sachdev
Library: Central Library and Archive Center of shahid Beheshti University (Tehran)
Subject: Integrated circuits,INTEGRATED CIRCUITS,THERMAL ENERGY,MANAGEMENT,CMOS,-- Management
Classification :
621
.
3815
V339T
2006
13. metric CMOS VLSI circuits-oriented testing for nano-Defect
Author:
Library: Central Library and Documents Center of Mazandaran University (Mazandaran)
Subject: Integrated circuits ; Very large scale integration ; Defects. ; Integrated circuits ; Very large scale integration ; Testing. ; Metal oxide semiconductors, Complementary ; Defects. ; Metal oxide semiconductors, Complementary ; Testing. ;
